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Pascal Cotret

@pa0x73cal

ENSTA @ Brest. Associate professor. Embedded systems, microarchitectures security, FPGA and other stuff. Trail-runner sometimes. pcotret.gitlab.io

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19.10.2023
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Latest posts by Pascal Cotret @pa0x73cal

Alibaba cloud FPGA: the 200$ Kintex UltraScale+ Using a decommissioned Alibaba cloud accelerator card as an FPGA dev board

essenceia.github.io/projects/ali...

02.12.2025 22:51 πŸ‘ 1 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
GoodWatch | KK4VCZ

Travis Goodspeed avait fait des choses avec un chip radio sur une montre/calculatrice Casio kk4vcz.com/goodwatch/

02.12.2025 11:27 πŸ‘ 1 πŸ” 0 πŸ’¬ 1 πŸ“Œ 0
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a woman wearing sunglasses and a hoodie is sitting in a crowd of people and making a peace sign . ALT: a woman wearing sunglasses and a hoodie is sitting in a crowd of people and making a peace sign .

HDR βœ…

29.11.2025 13:31 πŸ‘ 1 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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We’re introducing Google Scholar Labs to answer your research questions. Today, we are introducing Google Scholar Labs, a new feature that explores how generative AI can transform the process of answering detailed scholarly research questions…

blog.google/outreach-ini...

23.11.2025 15:39 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0

RedHat fait tourner Wine ?

18.11.2025 21:39 πŸ‘ 2 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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Lue - Lisez vos ebooks en audio dans le terminal | Le site de Korben Pour en avoir testΓ© quelques uns, je trouve que les lecteurs de livres audio, c’est jamais trΓ¨s pratique Γ  utiliser. Heureusement, je viens de ...

A tool to get "audiobooks" from EPUB files or (research) PDF articles
korben.info/lue-terminal...

26.09.2025 18:21 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
What if Humanity forgot how to make CPUs?
What if Humanity forgot how to make CPUs? YouTube video by LaurieWired

@lauriewired.bsky.social What if Humanity forgot how to make CPUs?
www.youtube.com/watch?v=L2OJ...

23.09.2025 18:08 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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Unlock Your Brain, Harden Your System #UYBHYS ! 7 Novembre 2025 – 8 Novembre 2025

Vous l'attendiez tous... la billetterie 2025 est ouverte, pour les "early birds" et les ateliers
pretix.eu/cantine/UYBH...
le programme des ateliers est disponible www.unlockyourbrain.bzh/ateliers/
celui des confΓ©rences arrive bientΓ΄t !

12.09.2025 13:28 πŸ‘ 10 πŸ” 11 πŸ’¬ 0 πŸ“Œ 2
Debian -- News -- Debian 13 "trixie" released

www.debian.org/News/2025/20...

09.08.2025 18:44 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
Portail Emploi CNRS - Offre d'emploi - Postdoc (H/F) : Environnements d'exΓ©cution RISC-V sΓ©curisΓ©s par le matΓ©riel

Postdoc offer at Lab-STICC / ENSTA Brest campus:

emploi.cnrs.fr/Offres/CDD/U...

07.08.2025 12:40 πŸ‘ 2 πŸ” 2 πŸ’¬ 0 πŸ“Œ 0
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Open Access Publication & ACM Open Access Publication & ACM

ACM is transitioning to a fully Open Access (OA) publishing model by the end of 2025
www.acm.org/publications...

29.07.2025 21:23 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0

Escouteloup et al. "PowerSecBench: reveal microarchitectural powerleakages using generic RISC-V microbenchmarks" (CF'25)
- Paper: hal.science/hal-05086034...
- Artifact: herd-ware.gitlab.io/book/artifac...

21.07.2025 12:30 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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Analyzing Microarchitectural Side-Channel Attacks Using Open-source gem5 simulator Microarchitectural side-channel attacks exploit subtle hardware behaviors, such as cache activity and instruction retirement patterns, to extract sensitive information. Understanding these attacks is ...

Analyzing Microarchitectural Side-Channel Attacks Using Open-source gem5 simulator #pts25 @passthesaltcon.bsky.social
passthesalt.ubicast.tv/videos/analy...

05.07.2025 11:07 πŸ‘ 1 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0
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A survey on versatile embedded Machine Learning hardware acceleration This survey investigates recent developments in versatile embedded Machine Learning (ML) hardware acceleration. Various architectural approaches for e…

"A survey on versatile embedded Machine Learning hardware acceleration" published in Elsevier Journal of System Architecture 😎
www.sciencedirect.com/science/arti...

25.06.2025 12:36 πŸ‘ 1 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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Semi-conducteurs : une usine en France ? Thales, Radiall et Foxconn prΓ©voient une unitΓ© de semi-conducteurs en France pour renforcer la souverainetΓ©.

opexnews.fr/production-s...

21.05.2025 05:18 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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Schtroumpfons la tentative de record du plus grand rassemblement de Schtroumpfs à Landerneau La commune du Finistère va tenter, ce samedi 17 mai, de battre son homologue allemande de Lauchringen, qui avait rassemblé 2 762 lutins bleus en 2019. Une parenthèse carnavalesque bienvenue.

Schtroumpfons la tentative de record du plus grand rassemblement de Schtroumpfs Γ  Landerneau

Ils sont fous ces Bretons, ou d’une insupportable lΓ©gΓ¨retΓ©, Γ  l’heure oΓΉ les esprits sont tout sauf Γ  la fΓͺte ? Sabrina Champenois salue cet Γ©lan collectif. Billet :

17.05.2025 15:43 πŸ‘ 43 πŸ” 17 πŸ’¬ 3 πŸ“Œ 11

Ca peut faire un joli D+

10.05.2025 19:32 πŸ‘ 1 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0

The submission site for #ACSAC2025 is now open for paper submissions: papers.submit.acsac.org

You can also find the full details of the call for papers on the website: www.acsac.org/2025/s...

06.05.2025 14:01 πŸ‘ 0 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0
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Skype est mort, merci Microsoft L’application de visioconfΓ©rence, propriΓ©tΓ© de Microsoft, ferme le rideau aujourd’hui, aprΓ¨s 22 annΓ©es de bons et loyaux services.

Skype 🫑
www.01net.com/actualites/s...

06.05.2025 12:02 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
HS3 2025: 1st Workshop on Hardware-Supported Software Security A workshop at ESORICS 2025, 25th of September 2025 in Toulouse, FR.

We are organising #HS3Workshop 2025: the 1st Workshop on Hardware-Supported Software Security, co-located with #ESORICS on 2025-09-25 in Toulouse, France.

Special theme: secure monitoring and intrusion detection. Submission deadline: 2025-05-21 AoE.

More info: hs3-workshop.github.io/2025.html

26.04.2025 07:44 πŸ‘ 2 πŸ” 2 πŸ’¬ 0 πŸ“Œ 0
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Rethinking System-on-Chip Verification for Secure Cross-layer Interactions The hardware and software layers of a modern System-on-Chip (SoC) play complementary roles to safeguard the confidentiality, integrity, and availability of security critical data and information. Due ...

Rethinking System-on-Chip Verification for Secure
Cross-layer Interactions

Paper: ieeexplore.ieee.org/abstract/doc...
Repo with PoCs: github.com/socsecresear...

28.04.2025 08:13 πŸ‘ 1 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0
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I lost my department's graduate meme competition this year

We live in a fallen world

27.04.2025 16:44 πŸ‘ 2 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0
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Efficient Trace for RISC-V: Design, Evaluation, and Integration in CVA6 In this work, we present the design and evaluation of a Processor Tracing System compliant with the RISC-V Efficient Trace specification for Instruction Branch Tracing. We integrate our system into th...

Efficient Trace for RISC-V: Design, Evaluation, and Integration in CVA6

arxiv.org/abs/2504.01972

25.04.2025 12:03 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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Keystone TEE + CVA6 RISC-V CPU running on a FPGA (blogpost soon) 🀠

24.04.2025 10:04 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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War on JITs: Software-Based Attacks and Hybrid Defenses for JIT Compilers - A Comprehensive Survey | ACM Computing Surveys Programming Language Virtual Machines (VMs) are composed of several components that together execute and manage languages efficiently. They are deployed in virtually all computing systems through mode...

ACM Computing Survey by Quentin Ducasse one of my former PhD students.

War on JITs: Software-Based Attacks and Hybrid Defenses for JIT Compilers - A Comprehensive Survey

Software attacks targeting JIT compilers in language VMs, and categorizes a range of defenses

dl.acm.org/doi/abs/10.1...

24.04.2025 09:31 πŸ‘ 0 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0
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For the past while J-P at @newae.com has been working on a major #ChipWhisperer doc refactor - this is now live, check out chipwhisperer.readthedocs.io/en/latest/in... . It moves software, hardware, and even some tricks/tips all into once place using Jupyter Books. Huge improvement in usability!

14.03.2025 22:14 πŸ‘ 9 πŸ” 6 πŸ’¬ 0 πŸ“Œ 0

Ca donne quoi ces "tongs" de trail du coup ?

19.04.2025 19:20 πŸ‘ 0 πŸ” 0 πŸ’¬ 1 πŸ“Œ 0
CHERI-Crypt: Transparent Memory Encryption on Capability Architectures | IACR Transactions on Cryptographic Hardware and Embedded Systems

CHERI-Crypt: Transparent Memory Encryption on Capability Architectures

tches.iacr.org/index.php/TC...

18.04.2025 06:55 πŸ‘ 2 πŸ” 1 πŸ’¬ 0 πŸ“Œ 0

From hardware to software: an end-to-end side-channel attack surface analysis (from VUSec, Amsterdam)

research.vu.nl/ws/portalfil...

18.04.2025 06:54 πŸ‘ 1 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0

πŸ₯²
bsky.app/profile/alci...

15.04.2025 14:40 πŸ‘ 1 πŸ” 0 πŸ’¬ 0 πŸ“Œ 0