Happy to announce I won the European Open Source Academy Special Recognition for Skills and Education! @eosa.bsky.social
www.zerotoasiccourse.com/post/eosa_aw...
07.03.2026 19:48
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Happy to announce I won the European Open Source Academy Special Recognition for Skills and Education! @eosa.bsky.social
www.zerotoasiccourse.com/post/eosa_aw...
Interested in trying out a Baochip-1x? The 'dabao' evaluation board is now taking pre-orders on Crowd Supply: www.crowdsupply.com/baochip/dabao
Woop, placed my order. There are a few left. Excited for the BIO 🤘
Synthesis is the #ASIC terminology of the week!
In the last month, Synthesis has been the 17th most popular out of 42 terms.
What if you could design your own microchip - and actually have it manufactured? Free if you live in switzerland! 🇨🇭
Get started with this 1 hour online workshop.
Go to tinytapeout.com/swisschips2026 to sign up!
Yes
Standard cell is the #ASIC terminology of the week!
In the last month, Standard cell has been the 4th most popular out of 42 terms.
Blown away by the amazing entries to this ASIC competition!
Very happy to announce the winners of our demoscene competition! 🏆
We had some amazing entries - check out what can be done in just a few square microns of silicon!
tinytapeout.com/competitions...
Thanks again to our judges and participants!
#silicon #demoscene #ASIC
STA is the #ASIC terminology of the week!
In the last month, STA has been the 11th most popular out of 42 terms.
In just over an hour I'll be announcing the winners of the TT08 demoscene competition!
Join us tomorrow at 19:00 CET for the announcement of the TT08 demoscene competition winners!
www.youtube.com/live/il_qKTi...
SPICE is the #ASIC terminology of the week!
In the last month, SPICE has been the 16th most popular out of 42 terms.
For our 12th Yosys User’s Group we’re inviting your questions! What have you always wanted to ask the team?
- Formal verification
- Synthesis
- Plugins / internals
- How to contribute
- Roadmap
Join us at 18:00 CET / 22:30 IST / 09:00 PT on Thursday 12th February.
At RF, your circuit stops being “small” compared to the signal - and everything changes.
New video interview about RF design, VNAs, simulation, and on-chip antennas.
www.youtube.com/watch?v=2xSA...
ULX3S PCB connected to computer monitor showing “Hello, World! This is an Isle FPGA Computer UART test.”
Work on 🏝️ Isle #FPGA computer input chapter continues. Here I’m testing UART with #ULX3S dev board.
great write up!
2/3) Amazingly my two entries work: 'Warp' and 'WhyNot' ; 'Warp' is my entry to the demoscene competition and 'WhyNot' was a crazy "let's do it in one day" last minute entry. Both work on actual ASIC!! How cool is that?
Preview of Warp: youtu.be/ELOYGwZgHnw
Finally, we’re ready to announce the demoscene competition winners! 🎉
Join us live on Wednesday the 11th at 19:00 CET to find out who won—and to hear how our amazing judges chose the winners.
Click “Notify me” on the stream to get an alert when we go live:
www.youtube.com/live/il_qKTi...
Greg Kroah Hartman won this years prize for excellence in open source!
#eosawards26
Jenny Molloy received special recognition for advocacy and awareness
Daniel Stenburg at the EU open source awards #eosawards26
Brits: you are nowhere near frightened enough of what's happening in the US right now and what UK politicians are promising with the help of Palantir and friends. From @ markmcposts on IG.
Shuttle is the #ASIC terminology of the week!
In the last month, Shuttle has been the 18th most popular out of 42 terms.
Fly through video for ROM-less Cordic Engine design.
This design is on TTSKY25A shuttle by @tinytapeout.com
Made easy with BlenderGDS plugin - github.com/aesc-silicon...
@mattvenn.net @urishaked.bsky.social @aksharvastarpara.bsky.social
Happy to announce that Anton Maurovic's "Antonalog analog VGA" design on our experimental chip TTIHP0.3 has been tested and is working!
www.tinytapeout.com/chips/ttihp0...
#opensource #ASIC #TinyTapeout
I hadn't heard of this RTL before! I've used NMOS as an example which is similar I think. Using a resistor instead of PMOSFET before the days of CMOS.
cool! but different type of RTL. I'm talking about Register Transfer Level, HDLs , Verilog that sort of thing.
