Got it. Ok I'm that case that's 100% my fault as ^D is burned into me as duplicate line so I abused my power to hack it in...sorry! If nobody else uses it I should probably remove it...
^D is my fault lol sorry :). It's a thing i use all the time...
But it's more like you'd like customisable key bindings in CE? That's probably a bit too much for us to do, the configuration UI is a lot of work; though if someone wants to send a PR we'd take it :)
To work in what sense?! We use Monaco which is as best I know the same editor as vscode?
Issue 8536
Well...oops...that's a dumb omission! Filing! :)
Yes; configurable in the options :)
Screenshot telling me I can get 6 months of Max! Yay!
Screenshot of what happens after I accept the Max 20x. I am already on 20x so can't "accept" this, only "downgrade to 5x more usage" :(
I really appreciate the 6mo free, @anthropic.com ! Yay but - I'm already on 20x and I can't accept it... - please help :)
At our next meeting on Monday 16th March come chat with @matt.godbolt.org in the pub (or on Zoom if you must) about JSbeeb, Compiler Explorer, and more! Free entry, but you have to buy your own drinks 😛
rougol.jellybaby.net/meetings/ind...
I had to
Sounds about right :-)
It's certainly a fun thing to debug when you get a very performance issue!
Pentium 4 Trace Cache is so back! Except yeah in a different way. The trace cache was the right idea, and when it worked it worked really well. But when it didn't the perf holes were pretty terrible. So instead we have something slightly less full-on, but it recovers more gracefully.
For folks who was a very niche, Intel Skylake-focused video on some of this stuff (although not so much the regular RAM cache part) I gave a talk a few months back on the subject: youtu.be/BVVNtG5dgks
It's such a fascinating topic, and changes quite rapidly, but the general ideas are the same still.
Most programmers are taught that L1 is the “top level” cache on x86.
It’s not quite true anymore!
Intel calls it the Decoded Stream Buffer (DSB), AMD the OpCache.
Only enough room for ~4,000 micro-ops, but there are interesting ways to take advantage of it.
Thank you! Honestly the hard work is done by @seanski44.bsky.social in trying to edit something coherent from my ramblings!
How do we know the random series of bits we just sent down your cable didn't get corrupted on the way? With CRCs! But what are these mysteries checks...I try to explain on today's @computerphile.bsky.social !https://youtu.be/_x0vbnUKYSU
Address generation interlock?!
Actually I don't! Maybe I should make one myself :)
Maybe both hahaha :)
Omg a whole part of my brain has lain dormant for 30+ years until being reminded of this! Thank you!
I'm releasing over 50 deep dives into The Sentinel, Geoff Crammond's epic #BBCMicro game.
Batch #1 is now ready: 6 new articles about memory maps, program flow and interrupts, all at thesentinel.bbcelite.com/deep_dives
Batch #2 (maths!) coming soon.
Enjoy!
#retrocomputing #retrogaming #c64 #8bit
Fellow nerds! 🤓 Want to help me play test my new Programming Puzzles Game website? programmingpuzzles.fun It's the companion site to my Programming Puzzles for Everyone book.
Have fun and report any issues.
Uncommonly excited about this: www.youtube.com/watch?v=uDtv... - trailer for a biopic of the legend himself, Bjarne Stroustrup!
.@matt.godbolt.org interviews @fbuontempo.bsky.social about "Learn C++ by Example," exploring practical teaching methods that make modern C++ features accessible through games and self-contained examples.
Hahaha you're not wrong. I'm trying to be upbeat about new tech ideas without being too doomy. It's tough to try and stay in the middle :)
Super important in this world of LLMs that /may/ speed up code writing but may also have some important caveats!
A die photo of the 8087 chip, with the main functional blocks labeled. The chip is a tan rectangle with complex patterns in dark brown. Many of the patterned regions are textured rectangles. One of the largest rectangles is the microcode ROM in the middle. The bottom half of the chip is the datapath, performing operations on floating-point numbers. The instruction decoding happens in the upper left. Around the edges of the chip, bond wires connect the chip to the 40 external pins, but the pins are not visible, just short segments of the bond wires.
In 1980, Intel released the 8087 floating-point chip, making math much faster. I'm reverse-engineering this chip, 46 years later. Most of its instructions are implemented in microcode, but some are implemented in hardware. Let's look at the circuitry that decodes instructions and decides what to do.
New Two's Complement Episode: How Fast is Fast?
Ben interviews Matt with a deceptively simple question: make my program go fast. 44 minutes later, robot dogs are falling over, Grace Hopper's wire turns up, and Matt still hasn't gotten the job.
Listen at: twoscomplement.org#podcast/how-... :)
now that Git 2.53 is out, the Git data model @omarieclaire.bsky.social and I wrote is on the official Git website! git-scm.com/docs/gitdata...
