ROHD A better way to develop hardware. Star Count

🚀 ROHD v0.6.7 is out!

This release focuses on cleaner generated RTL, better debugability, and faster simulation—plus lots of sharp edge-case fixes.

🔗 buff.ly/IuFHW8z

#ROHD #HardwareDesign #SystemVerilog #EDA #OpenSource

AI-accelerated Agile Design Using the ROHD Framework There is a lot of excitement about applying AI to VLSI design as well as a lot of concern that Large Language Models (LLMs) will generate expansive hardware descriptions riddled with hard-to-find…

🧩 Want the details behind AI-accelerated hardware design?
Desmond Kirkpatrick’s blog shows how ROHD and LLMs enable agile, test-driven hardware evolution.
📝 buff.ly/kKimODN

Join the community 👉 buff.ly/MKcOpvD

#AI #EDA #OpenSourceHardware #Hardware #ROHD

AI Accelerated Agile Design Using the ROHD Framework This video demonstrates using AI-accelerated agile hardware design in the Rapid Open Hardware Development or (ROHD) framework (https://intel.github.io/rohd-website/) to build a new component, a…

🚀 AI isn’t just for software engineers anymore!
Intel’s Desmond Kirkpatrick shows how LLMs + the ROHD framework can assist hardware engineers in real-time design and verification.
🎥 Watch: buff.ly/VQTogJb

#AI #HardwareDesign #ROHD #AgileHardware #OpenSource #Semiconductors

ROHD A better way to develop hardware. Latest release

🚀 ROHD is officially silicon-proven! 🎉 Open-source hardware just took a big step forward—ROHD designs are now running on real silicon!

Big thanks to everyone who contributed—your work is in real chips. 🏆 More to come!

🔗 Learn more: https://buff.ly/3WLth4y

#ROHD #OpenSourceHardware

Procedural Combinational Logic, SystemVerilog’s always_comb, and SSA in ROHD ROHD has recently gained a powerful new feature in the Combinational.ssa constructor for Combinationals that allows safer implementations of equivalent always_comb logic in SystemVerilog. This post…

It's pretty cool that my post on combinational logic in ROHD is in the top 3 results on Google when you search for `always_comb`! https://buff.ly/3Ek2XrY #rohd #always_comb #SystemVerilog #dart #opensource

While it's disappointing that Dart macros are put on hold, I'm glad that features like augmentation are still planned. I think leveraging build_runner with augmentations could provide a lot! https://buff.ly/3Ei6JST #dart #rohd

ROHD A better way to develop hardware. Latest release

Hey, ROHD community! We're pleased to announce the release of ROHD Cosim v0.3.0, now supporting in/out ports and Verilator for enhanced simulation. Also, ROHD v0.6.2 is out, featuring some bug fixes and improved adder syntax in SystemVerilog. https://buff.ly/3WLth4y #rohd #verilator

👋 Hi, I’m Max! Principal Engineer @ Intel & lead of ROHD, an open-source project making hardware design more fun & accessible.

Passionate about hardware, software, open source, and Dart. Also snowboarding, gaming, & new tech!

#introduction #opensource #hardware #FPGA #SoC #Dart #HDL #ROHD